Questions on summing and difference amplifiers

Question 1

Explain why a summing amplifier does not simply add its input voltages.

Accepted Answer

Each input drives its own current V/R into the virtual earth, so each input is amplified by its own gain R_f/R_in before it joins the total (1). The output is therefore minus the weighted sum, with the weights set by the input resistors (1). Adding the voltages first and applying a single gain is correct only when every input resistor is equal.

Question 2

State the two facts about the summing point of an inverting amplifier that carry the derivation marks.

Accepted Answer

The inverting input is held at 0 V by the feedback, a virtual earth, so the current through each input resistor is simply that input's voltage divided by its own resistance (1). The op-amp's input resistance is taken as infinite, so no current enters the chip and the whole total leaves through R_f (1).

Question 3

Write down the equation for the output of a difference amplifier, and state the order in which the two operations must be carried out.

Accepted Answer

V_out = (V₊ − V₋) × R_f/R₁ (1). Subtract first, then multiply by the gain (1). Amplifying each input separately and subtracting afterwards would demand intermediate outputs of kilovolts, and the chip would saturate.

Question 4

Explain how a difference amplifier removes interference picked up on the leads of a sensor.

Accepted Answer

The two leads run side by side, so mains wiring induces the same interference on both; it is common-mode (1). Identical on both inputs, it appears in both terms of V₊ − V₋ and cancels before any gain is applied, while the wanted signal, a genuine difference between the leads, survives at full gain (1).

Question 5

State what happens to the output of a summing amplifier when the calculated output voltage is larger than the supply rails, and state the check a designer should always make.

Accepted Answer

The output cannot pass the rails, so it saturates a volt or so inside the rail and stays there, clipping the waveform flat (1). Every design should end by computing the worst-case output and holding it against the rails (1).

Question 6

State what limits the accuracy of a weighted-resistor digital-to-analogue converter, and state how accurate each resistor weight must be.

Accepted Answer

Every gain is a ratio of real resistors, and real resistors carry a tolerance, commonly 5% or 1%, so two 5% resistors can leave a weight almost 10% adrift (1). Each weight must be accurate to better than half a step of the staircase, or the output stops rising in equal steps with the code (1). Holding every weight that closely is what drives real converters away from this design.

Question 7

A summing amplifier has R_f = 100 kΩ. Its three inputs are 0.20 V through 100 kΩ, 0.30 V through 50 kΩ and 0.10 V through 20 kΩ. Calculate the current from each input and the output voltage.

Accepted Answer

Each input sees a virtual earth, so the currents are 0.20/100 kΩ = 2 μA, 0.30/50 kΩ = 6 μA and 0.10/20 kΩ = 5 μA (1). They add at the node to 13 μA, all of which leaves through R_f (1). V_out = −13 × 10⁻⁶ × 100 × 10³ = −1.30 V (1).

Question 8

A summing amplifier has R_f = 47 kΩ, with V₁ = 0.50 V through R₁ = 47 kΩ and V₂ = −0.25 V through R₂ = 4.7 kΩ. Calculate the output voltage.

Accepted Answer

Gains first: 47/47 = 1 and 47/4.7 = 10 (1). V_out = −(1 × 0.50 + 10 × (−0.25)) = −(0.50 − 2.50) (1) = +2.0 V (1). Because the negative input is amplified and the complete sum is inverted, the output is positive.

Question 9

A 4-bit weighted-resistor DAC uses R_f = 10 kΩ with input resistors of 10, 20, 40 and 80 kΩ from the most significant bit downward, and logic 1 = 5.0 V. Calculate the step size and the magnitude of the output for the input 0110.

Accepted Answer

One least significant bit gives 5.0 × 10/80 = 0.625 V, and that is the step (1). The code 0110 is the number 6, so the output magnitude is 6 × 0.625 = 3.75 V (1). Checking by weights: the 4 bit gives 5.0 × 10/20 = 2.50 V and the 2 bit gives 5.0 × 10/40 = 1.25 V, total 3.75 V (1), and the output appears as −3.75 V. If the weighted sum disagrees with count × step, a resistor weight has been misread: the most significant bit takes the smallest resistor, 10 kΩ, not the 80 kΩ.

Question 10

A difference amplifier with R_f/R₁ = 50 has V₊ = 3.4120 V and V₋ = 3.3800 V. Calculate the output voltage.

Accepted Answer

V₊ − V₋ = 3.4120 − 3.3800 = 32.0 mV (1). V_out = 3.2 × 10⁻² × 50 (1) = 1.60 V (1). Amplifying V₊ alone would demand 3.4120 × 50 = 171 V, far beyond any rail, so the subtraction must be taken before the gain.

Question 11

Two leads from a sensor arrive at a difference amplifier of gain 200. The wanted signal is a difference of 12 mV between them, and each lead also carries an identical 0.25 V of mains hum. Calculate the output, and state the contribution the hum makes to it.

Accepted Answer

The hum is identical on both inputs, so it appears in both terms of V₊ − V₋ and cancels: its contribution is zero (1). The difference left is 12 mV (1), so V_out = 1.2 × 10⁻² × 200 = 2.4 V (1). If the hum were amplified it would give 0.25 × 200 = 50 V of interference.

Question 12

A summing amplifier gives gains of 3 and 5 to its two inputs and saturates at ±13 V. Determine the output when V₁ = 1.0 V and V₂ = 2.4 V, and the largest V₂ the amplifier can handle linearly with V₁ held at 1.0 V.

Accepted Answer

The ideal calculation gives −(3 × 1.0 + 5 × 2.4) = −15 V (1), which exceeds the −13 V output limit, so the output saturates at approximately −13 V and the waveform is clipped (1). For linear working 3 × 1.0 + 5V₂ ≤ 13, so V₂ ≤ 2.0 V (1).

Question 13

A 4-bit weighted-resistor DAC built on a summing amplifier has a step size of 0.625 V. Calculate the magnitude of its full-scale output and state the number of distinct output levels.

Accepted Answer

The largest code is 1111, the number 15, so the full-scale output has magnitude 15 × 0.625 = 9.375 V; the summer inverts, so the output itself runs from 0 V down to −9.375 V (1). There are 2⁴ = 16 distinct levels, from 0 to 15 (1). Full scale uses 15 steps, not 16: n bits give 2ⁿ levels but only 2ⁿ − 1 steps between them, so 16 × 0.625 = 10.0 V overstates full scale by one step.

Question 14

An 8-bit weighted-resistor DAC uses R_f = 10 kΩ, logic 1 = 5.0 V, and 10 kΩ as the input resistor of the most significant bit, each successive bit's resistor being double the one before. Calculate the resistance of the least significant bit's resistor, the step size and the magnitude of the full-scale output, then determine the accuracy each resistor weight needs if the staircase is to stay correct to within half a step, and comment on the practicality of the design.

Accepted Answer

Seven doublings from the MSB give R_LSB = 10 × 2⁷ = 1280 kΩ (1). Step = 5.0 × 10/1280 = 3.91 × 10⁻² V, that is 39.1 mV (1). Full scale = (2⁸ − 1) × step = 255 × 3.906 × 10⁻² = 9.96 V in magnitude, the inverting output running from 0 V down to −9.96 V (1). Half a step is 19.5 mV (1), and the MSB contributes the full 5.0 V, so its weight must be right to 19.5/5000 = 0.39% (1). Eight precision resistors are therefore needed, spanning 10 kΩ to 1280 kΩ, a range of 128 to 1, each held to about 0.4% (1). That is why real converters abandon the weighted-resistor design in favour of an R-2R ladder, which needs only two resistor values (1). Half a step must be compared with the contribution of the bit whose resistor is in question rather than with the output.

Question 15

An audio mixer is built round a summing amplifier with R_f = 100 kΩ and must give voltage gains of 1, 2 and 5 to its three channels. Calculate the three input resistors, and calculate the output at an instant when the channel inputs are 0.10 V, 0.15 V and 0.02 V.

Accepted Answer

Each gain is R_f/R_in, so R_in = R_f/gain: 100 kΩ, 50 kΩ and 20 kΩ (2). V_out = −(1 × 0.10 + 2 × 0.15 + 5 × 0.02) = −(0.10 + 0.30 + 0.10) (1) = −0.50 V (1). Multiplying R_f by the gain instead of dividing would give the highest-gain channel the largest resistor.

Question 16

A strain-gauge bridge sits balanced with both midpoints at 2.5000 V. Under load one midpoint rises to 2.5085 V while the other stays put. A difference amplifier built with R₁ = 1.0 kΩ is to give an output of 4.0 V under that load. Calculate the difference voltage, the gain needed and R_f, and state what would happen if the raised midpoint were fed to an ordinary inverting amplifier of the same gain instead.

Accepted Answer

V₊ − V₋ = 2.5085 − 2.5000 = 8.5 mV (1). Gain = 4.0/(8.5 × 10⁻³) = 471 (1), so R_f = 471 × 1.0 kΩ ≈ 471 kΩ (1). Fed to an inverting amplifier of the same gain, the standing 2.5085 V would demand an output of about 1.2 kV, so the amplifier would sit saturated at a rail and the strain signal would be invisible (1).

Question 17

A sensor delivers 1.00 V at the bottom of its range and 1.50 V at the top. A summing amplifier with R_f = 100 kΩ is to convert this to 0 V at the bottom of the range and −5.0 V at the top, using the sensor through R₁ and a steady −1.00 V reference through R₂. Calculate both input resistors, and verify the output at each end of the range.

Accepted Answer

The sensor's 0.50 V span must become a 5.0 V span, so its gain is 5.0/0.50 = 10 and R₁ = 100/10 = 10 kΩ (2). At the bottom of the range the sensor alone would give −10 × 1.00 = −10.0 V, so the reference must contribute +10.0 V; with a reference of −1.00 V that needs a gain of 10 as well, giving R₂ = 10 kΩ (1). Check: at 1.00 V in, V_out = −(10 × 1.00 + 10 × (−1.00)) = 0.0 V (1). At 1.50 V in, V_out = −(10 × 1.50 − 10) = −5.0 V (1), inside the rails.